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low power, rail-to-rail output, video op amps with ultralow power data sheet ada4853-1 / ada4853-2 / ada4853-3 rev. g document feedback information furnished by analog devices is believed to be accurate and reliable. however, no responsibility is assumed by analog devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. specifications subject to change without notice. no license is granted by implication or otherwise under any patent or patent rights of analog devices. trademarks and registered trademarks are the property of their respective owners. one technology way, p.o. box 9106, norwood, ma 02062-9106, u.s.a. tel: 781.329.4700 ?2006C2014 analog devices, inc. all rights reserved. technical support www.analog.com features qualified for automotive applications ( ada4853-3w only) ultralow disable current: 0.1 a low quiescent current: 1.4 ma/amplifier ideal for standard definition video high speed 100 mhz, ?3 db bandwidth 120 v/s slew rate 0.5 db flatness: 22 mhz differential gain: 0.20% differential phase: 0.10 single-supply operation rail-to-rail output output swings to within 200 mv of either rail low voltage offset: 1 mv wide supply range: 2.65 v to 5 v applications automotive infotainment systems automotive safety systems portable multimedia players video cameras digital still cameras consumer video clock buffer pin configurations v out 1 +in 3 2 ada4853-1 top view (not to scale) ?v s +v s 6 ?in 4 5 disable 0 5884-001 05884-002 notes 1. nc = no connect. 2. exposed die pad must be connected to gnd. 1 v out 1 2 ?in1 3 +in1 4 ?v s 11 v out 2 12 +v s 10 ?in2 9 +in2 5 n c 6 n c 7 n c 8 n c 1 5 n c 1 6 n c 1 4 d i s a b l e 1 1 3 d i s a b l e 2 ada4853-2 ? + ? + figure 1. 6-lead sc70 figure 2. 16-lead lfcsp_wq 05884-003 notes 1. exposed die pad must be connected to gnd. 1 disable 1 2 disable 2 3 disable 3 4 +v s 11 +in2 12 ?v s 10 ?in2 9 v out 2 5 + i n 1 6 ? i n 1 7 v o u t 1 8 ? v s 1 5 v o u t 3 1 6 + v s 1 4 ? i n 3 1 3 + i n 3 a d a 4853-3 +? + ? + ? ada4853-3 1 2 3 4 5 6 7 disable 2 disable 3 +v s v out 1 ?in1 +in1 disable 1 14 13 12 11 10 9 8 ?in3 +in3 ?v s v out 2 ?in2 +in2 v out 3 + ? + ? + ? 05884-004 figure 3. 16-lead lfcsp_wq figure 4. 14-lead tssop general description the ada4853-1 / ada4853-2 / ada4853-3 are low power, low cost, high speed, rail-to-rail output op amps with ultralow power disables that are ideal for portable consumer electronics. despite their low price, the ada4853-1 / ada4853-2 / ada4853-3 provide excellent overall performance and versatility. the 100 mhz, ?3 db bandwidth, and 120 v/s slew rate make these amplifiers well- suited for many general-purpose, high speed applications. the ada4853-1 / ada4853-2 / ada4853-3 voltage feedback op amps are designed to operate at supply voltages as low as 2.65 v and up to 5 v using only 1.4 ma of supply current per amplifier. to further reduce power consumption, the amplifiers are equipped with a disable mode that lowers the supply current to less than 1.5 a maximum, making them ideal in battery-powered applications. the ada4853-1 / ada4853-2 / ada4853-3 provide users with a true single-supply capability, allowing input signals to extend 200 mv below the negative rail and to within 1.2 v of the positive rail. on the output, the amplifiers can swing within 200 mv of either supply rail. with their combination of low price, excellent differential gain (0.2%), differential phase (0.10), and 0.5 db flatness out to 22 mhz, these amplifiers are ideal for video applications. the ada4853-1 is available in a 6-lead sc70, the ada4853-2 is available in a 16-lead lfcsp_wq, and the ada4853-3 is available in both a 16-lead lfcsp_wq and a 14-lead tssop. the ada4853-1 temperature range is ?40c to +85c while the ada4853-2 / ada4853-3 temperature range is ?40c to +105c. 6.5 6.4 6.3 6.2 6.1 6.0 5.9 5.8 5.7 5.6 5.5 0.1 1 10 40 frequency (mhz) closed-loop gain (db) v s =5v r l = 150 ? g=+2 0.1v p-p 2.0v p-p 05884-010 figure 5. 0.5 db flat ness frequency response
ada4853- 1/ada4853 - 2/ada4 853- 3 data sheet tabl e of contents features .............................................................................................. 1 applications ....................................................................................... 1 pin configurations ........................................................................... 1 general description ......................................................................... 1 revision history ............................................................................... 2 specifications ..................................................................................... 3 specifications with 3 v supply ................................................... 3 specifications with 5 v supply ................................................... 5 absolute max imum ratings ............................................................ 7 thermal resistance ...................................................................... 7 esd caution .................................................................................. 7 typical perfor mance characteristics ..............................................8 circuit description ......................................................................... 16 headroom considerations ........................................................ 16 overload behavior and recovery ............................................ 16 applications information .............................................................. 17 single - supply video amplifier ................................................. 17 power supply bypassing ............................................................ 17 layout .......................................................................................... 17 outline dimensions ....................................................................... 18 ordering guide .......................................................................... 19 automotive products ................................................................. 19 revision history 12/1 4 rev. f to rev. g updated figure 54; outline dimensions ..................................... 1 8 changes to ordering guide .......................................................... 1 9 1/11 rev. e to rev. f changes to features section , applications section , and general description section .......................................................................... 1 changed pin 5 to disable in figure 1 ........................................ 1 changed pin 13 to disable 2 and pin 14 and disable 1 in figure 2 .............................................................................................. 1 changes to tab le 1 ............................................................................ 3 changes to table 2 ............................................................................ 5 changes to ordering guide .......................................................... 18 added automotive products section ........................................... 18 9 /10 rev. d to rev. e changes to figure 2 and figure 3 ................................................... 1 6 /10 rev. c to rev. d changes to figure 2 and figure 3 ................................................... 1 changes to outline dimensions ................................................... 16 10 /07 rev. b to rev. c changes to applications section .................................................... 1 changes to ordering guide .......................................................... 16 10/06 rev. a to rev. b added ada4853 - 3 .............................................................. universal added 16 - lead lfcsp _vq .............................................. universal added 14 - lead tssop ...................................................... universal changes to features .......................................................................... 1 changes to dc performance, input characteristics, a nd power supply sections ..................................................................... 3 changes to dc performance, input characteristics, and power supply sections ...................................................................... 4 changes to figure 2 0 ......................................................................... 8 changes to figure 49 ...................................................................... 13 updated outline dimensions ....................................................... 1 6 changes to ordering guide .......................................................... 16 7/06 rev. 0 to rev. a added ada4853 - 2 .............................................................. unive rsal changes to features an d general description .............................. 1 changes to table 1 ............................................................................. 3 changes to table 2 ............................................................................. 4 changes to table 3 ............................................................................. 5 changes to figure 7 ........................................................................... 6 changes to figure 11 caption, figure 12, figure 13, and figure 16 ...................................................................................... 7 changes to figure 17 and figure 19 ............................................... 8 inserted figur e 21; renumbered sequentially .............................. 8 inserted figure 25; renumbered sequentially .............................. 9 changes to figure 28 ......................................................................... 9 changes to figure 31 through figure 35 ..................................... 10 changes to figure 37, figure 39 through figure 42 .................. 11 inserted figure 43 and figure 46 .................................................. 12 inserted figure 47 ........................................................................... 13 ch anges to circuit description section ...................................... 13 changes to headroom considerations section ......................... 13 changes to figure 48 ...................................................................... 14 updated outline dimensions ....................................................... 15 changes to ordering guide .......................................................... 15 1/06 revision 0: initial version rev. g | page 2 of 20
data sheet ada4853- 1/ada4853 - 2/ada4853 - 3 specifications specifications with 3 v supply t a = 2 5c, r f = 1 k?, r g = 1 k? for g = +2, r l = 150 ?, unless otherwise no ted. table 1 . parameter conditions min typ max unit dynamic performance ?3 db bandwidth g = +1, v o = 0.1 v p -p 90 mhz g = +2, v o = 2 v p -p 32 mhz bandwidth for 0.5 db flatness g = +2, v o = 2 v p - p, r l = 150 ? 22 mhz settling time to 0.1% v o = 2 v step 45 ns slew rate g = +2, v o = 2 v step 88 100 v/s ada4853 -3w only: t min to t max 60 v/s noise/distortion performance differential gain r l = 150 ? 0.20 % differential phase r l = 150 ? 0.10 degrees input voltage noise f = 100 khz 22 nv/hz input current noise f = 100 khz 2.2 pa/hz crosstalk g = +2, v o = 2 v p - p, r l = 150 ?, f = 5 mhz ?66 db dc performance input offset voltage 1 4 .0 mv ada4853 -3w only: t min to t max 6.0 mv input offset voltage drift 1.6 v/c input bias current 1.0 1.7 a ada4853 -3w only: t min to t max 1.7 a input bias current drift 4 na/c input bias offset current 50 na open - loop gain v o = 0.5 v to 2.5 v 72 80 db ada4853 -3w only: t min to t max 69 db input characteristics input resistance differential/common mode 0.5/20 m? input capacitance 0.6 pf input common - mode voltage range ?0.2 to +v cc ? 1.2 v input overdrive recovery time (rise/fall) v in = ?0.5 v to +3.5 v, g = +1 40 ns common - mode rejection ratio v cm = 0 v to 1 v ?69 ?85 db ada4853 -3w only: t min to t max ?66 db disable disable input voltage 1.2 v turn - off time 1.4 s turn - on time 120 ns disable bias current enabled disable = 3.0 v 25 30 a dis able = 3.0 v, ada4853 -3w only: t min to t max 30 a disabled disable = 0 v 0.01 a output characteristics output overdrive recovery time v in = ?0.25 v to +1.75 v, g = +2 70 ns output voltage swing r l = 150 ? 0.3 to 2.7 0.15 to 2.88 v r l = 150 ?, ada4853 -3w only: t min to t max 0.3 to 2.7 v short - circuit current sinking/sourcing 150 /120 ma rev. g | page 3 of 20
ada4853- 1/ada4853 - 2/ada4 853- 3 data sheet parameter conditions min typ max unit power supply operating range 2.65 5 v quiescent current/amplifier 1.3 1.6 ma ada4853 -3w only: t min to t max 1.6 ma quiescent current (disabled)/amplifie r disable = 0 v 0.1 1.5 a disable = 0 v, ada4853 -3w only: t min to t max 1.5 a positive power supply rejection +v s = +1.5 v to +2.5 v, ?v s = ?1.5 v ?76 ?86 db ada4853 -3w only: t min to t max ?76 db negative power supply rejection ?v s = ?1.5 v to ?2.5 v, +v s = +1.5 v ?77 ?88 db ada4853 -3w only: t min to t max ?74 db rev. g | page 4 of 20
data sheet ada4853- 1/ada4853 - 2/ada4853 - 3 specifications with 5 v supply t a = 25c, r f = 1 k?, r g = 1 k? for g = +2, r l = 150 ?, unless otherwise no ted. table 2 . paramet er conditions min typ max unit dynamic performance ?3 db bandwidth g = +1, v o = 0.1 v p -p 100 mhz g = +2, v o = 2 v p -p 35 mhz bandwidth for 0.5 db flatness g = +2, v o = 2 v p -p 22 mhz settling time to 0.1% v o = 2 v step 54 ns slew rat e g = +2, v o = 2 v step 93 120 v/s ada4853 -3w only: t min to t max 70 v/s noise/distortion performance differential gain r l = 150 ? 0.22 % differential phase r l = 150 ? 0.10 degrees input voltage noise f = 100 khz 22 nv/hz input current noise f = 100 khz 2.2 pa/hz crosstalk g = +2, v o = 2 v p - p, r l = 150 ?, f = 5 mhz ?66 db dc performance input offset voltage 1 4.1 mv ada4853 -3w only: t min to t max 6.0 mv input offset voltage drift 1.6 v/c input bias current 1.0 1.7 a ad a4853 -3w only: t min to t max 1.7 a input bias current drift 4 na/c input bias offset current 60 na open - loop gain v o = 0.5 v to 4.5 v 72 80 db ada4853 - 3w only: t min to t max 70 db input characteristics input resistance differential/common mode 0.5/20 m? input capacitance 0.6 pf input common - mode voltage range ?0.2 to +v cc ? 1.2 v input overdrive recovery time (rise/fall) v in = ?0.5 v to +5.5 v , g = +1 40 ns common - mode rejection ratio v cm = 0 v to 3 v ?71 ?88 db ada4853 - 3w only: t min to t max ?68 db disable disable input voltage 1.2 v turn - off tim e 1.5 s turn - on time 120 ns disable bias current enabled disable = 5 v 40 50 a disable = 5 v, ada4853 -3w only: t min to t max 50 a disabled disable = 0 v 0.01 a output characteristics output overdrive recovery time v in = ?0.25 v to +2.75 v, g = +2 55 ns output voltage swing r l = 75 ? 0.55 to 4.5 0.1 to 4.8 v r l = 75 ?, ada4853 - 3w only: t min to t max 0.55 to 4.5 v short - circuit curren t sinking/sourcing 160/120 ma rev. g | page 5 of 20
ada4853- 1/ada4853 - 2/ada4 853- 3 data sheet paramet er conditions min typ max unit power supply operating range 2.65 5 v quiescent current/amplifier 1.4 1.8 ma ada4853 -3w only: t min to t max 1.8 ma quiescent cu rrent (disabled)/amplifier disable = 0 v 0.1 1.5 a disable = 0 v, ada4853 -3w only: t min to t max 1.5 a positive power supply rejection +v s = +2.5 v to +3.5 v, ?v s = ?2.5 v ?75 ?80 db ada4853 -3w only: t min to t max ?72 negative power supply rejection ?v s = ?2.5 v to ?3.5 v, +v s = +2.5 v ?75 ?80 db ada4853 - 3w only: t min to t max ?72 db rev. g | page 6 of 20
data sheet ada4853- 1/ada4853 - 2/ada4853 - 3 absolute maximum rat ings table 3 . parameter rating supply voltage 5.5 v power dissipation see figure 6 common - mode input voltage ?v s ? 0.2 v to +v s ? 1.2 v differential input voltage v s storage temperature range ?65c to +125c operating temperature range 6 - lead sc70 ?40c to +85c 16 - lead lfcsp_w q ?40c to +105c 14- lead tssop ?4 0c to +105c lead temperature jedec j - std -20 junction temperature 150c stresses above those listed under absolute maximum ratings may cause permanent damage to the device. this is a stress rating only; functional operation of the device at these or a ny other conditions above those indicated in the operational section of this specification is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. thermal resistance ja is specified for the worst - case conditions, that is, ja is specified for the device soldered in the circuit board for surface - mount packages. table 4 . package type ja unit 6 - lead sc70 430 c/w 16- lead lfcsp_w q 63 c/w 14 - lead tssop 120 c/w maximum power dissipation the maximum safe power dissipation for the ada4853 - 1 / ada4853 - 2 / ada4853 - 3 is limited by the associated rise in junction temperature (t j ) on the die. at approximately 150 c, which is the glass transition temperature, the pl astic changes its properties. even temporarily excee d ing this temperature limit can change the stresses that the package exerts on the die, permanently shifting the parametric perfor m ance of the amplifiers. exceeding a junction temperature of 150c for an extended period can result in changes in silicon devices, potentially causing degradation or loss of fun c tionality. the power dissipated in the package (p d ) for a sine wave and a resistor load is the total power consumed from the supply minus the load po wer. p d = total power consumed ? load power ( ) l out current supply voltage supply d r v i v p 2 C = 3.0 0 125 105 85 65 45 25 5 ?15 ?35 ?55 ambient temperature (c) maximum power dissipation (w) 2.5 2.0 1.5 1.0 0.5 sc70 tssop lfcsp 05884-059 figure 6 . maximum power dissipation vs. temperature for a 4 - layer board esd caution rev. g | page 7 of 20
ada4853-1/ada4853-2/ada4853-3 data sheet rev. g | page 8 of 20 typical performance characteristics 2 ?6 0.1 200 frequency (mhz) normalized closed-loop gain (db) 11 01 0 0 1 0 ?1 ?2 ?3 ?4 ?5 g = ?1* g = +2* g = +10* v s = 5v r l = 150 ? v out = 0.1v p-p 0 5884-006 *ada4853-1/ada4853-2 ada4853-3 lfcsp figure 7. small signal frequency response for various gains v s = 5v g = +1 v out = 0.1v p-p r l = 75 ? frequency (mhz) closed-loop gain (db) 3 2 0 1 ?1 ?2 ?3 ?4 ?5 ?6 0.1 1 10 100 200 r l = 150 ? r l = 1k ? 0 5884-007 figure 8. small signal frequency response for various loads frequency (mhz) closed-loop gain (db) 4 3 2 1 ?1 0 ?4 ?5 ?3 ?2 ?6 0.1 1 10 100 200 g = +1 r l = 150 ? v out = 0.1v p-p v s = 3v v s = 5v 05884-008 figure 9. small signal frequency response for various supplies r l c l r snub 5 3 4 0 ?3 ?4 ?5 ?2 ?1 1 2 ?6 0.1 1 10 100 200 frequency (mhz) closed-loop gain (db) v s = 5v r l = 150 ? v out = 0.1v p-p g = +1 c l = 0pf c l = 5pf c l = 10pf 05884-009 c l = 10pf/25 ? snub figure 10. small signal frequency response for various capacitive loads 6.5 6.4 6.3 6.2 6.1 6.0 5.9 5.8 5.7 5.6 5.5 0.1 1 10 40 frequency (mhz) closed-loop gain (db) v s =5v r l =150 ? g=+2 0.1v p-p 2.0v p-p 05884-010 figure 11. 0.5 db flatness response for various output voltages 8.0 0.1 1000 frequency (mhz) closed-loop gain (db) 11 01 0 0 7.8 7.6 7.4 7.2 7.0 6.8 6.6 6.4 6.2 6.0 5.8 5.6 0.1v p-p 2v p-p v s = 5v r l = 150 ? g = +2 05884-060 figure 12. ada4853-3 lfcsp_wq flatness response for various output voltages
data sheet ada4853- 1/ada4853 - 2/ada4853 - 3 f r e q u e nc y ( m h z ) 1 0 ?1 ?2 ?3 ?4 ?5 ?6 n o r m a liz e d c l o se d - l oo p g a i n ( d b ) 0.1 1 10 100 200 v s = 5v r l = 15 0 ? v out = 2v p-p g = ?1 g = + 2 g = + 1 0 05884-011 figure 13 . large signal frequency response for various gains c l o se d - l oo p g a i n ( d b ) 7 6 5 4 3 2 1 0 f r e q u e n c y ( m h z ) 0 . 1 20 0 1 1 0 10 0 v s = 5 v v o u t = 2 v p -p g = +2 r l = 1k ? r l = 75 ? r l = 1 50 ? 05884-012 figure 14 . large signal frequency response for various loads closed-loop gain (db) 5 3 4 2 1 0 ?1 ?2 ?3 ?4 ?5 ?6 f r eq u enc y (m h z ) 0.1 1 10 100 200 v s = 3v r l = 150? v out = 0.1v p-p g = +1 +25c +85c ?40c 05884-013 figure 15 . small signal frequency response for various temperatures frequency (mhz) 4 3 2 0 1 ?1 ?2 ?4 ?3 ?6 ?5 0.1 1 10 100 200 v s = 5v r l = 150? v out = 0.1v p-p g = +1 c l o se d - l oo p g a i n ( d b ) +25c +85c ?40c 05884-014 figure 16 . small signal frequency response for various temperatures 25 0 20 0 10 0 15 0 5 0 0 0 0 . 5 1 . 5 2 . 5 3 . 5 1 . 0 2 . 0 3 . 0 4 . 0 o u t p u t vo l t a g e s t ep (v) s l e w rat e (v / s) n e g a t i ve s l e w ra t e p o s i t i ve s l e w ra t e v s = 5 v r l = 150 ? g = +2 05884-015 figure 17 . slew rate vs. output voltage 14 0 ?2 0 10 0 f r eq u enc y (h z) open-loop gain (db) open-loop phase (degrees) 1 k 10 k 100 k 1 m 10 m 100 m 12 0 10 0 8 0 6 0 4 0 2 0 0 ?24 0 ?21 0 ?18 0 ?15 0 ?12 0 ?9 0 ?6 0 ?3 0 0 g a i n pha se 05884-029 v s = 5 v r l = 150 ? rev. g | page 9 of 20
ada4853-1/ada4853-2/ada4853-3 data sheet rev. g | page 10 of 20 ? 20 ?90 ?80 ?70 ?60 ?50 ?40 ?30 100 1k 10k 100k 1m 10m 100m common-mode rejection (db) frequency (hz) 05884-030 v s = 5v figure 19. common-mode rejection vs. frequency 0 ?100 100 1k 10k 100k 1m 10m 100m power supply rejection (db) frequency (hz) ?10 ?20 ?30 ?40 ?50 ?60 ?70 ?80 ?90 +psr ?psr v s = 5v gain = +2 rto 05884-031 figure 20. power supply rejection vs. frequency 1000 0.01 0.1 1 10 100 100 1k 10k 100k 1m 10m 100m closed-loop output impedance ( ? ) frequency (hz) 05884-032 v s = 5v g = +1 figure 21. output impeda nce vs. frequency enabled 10m 100 1k 10k 100k 1m 10m 100m frequency (hz) closed-loop output impedance ( ? ) 10 100 1k 10k 100k 1m v s = 5v g = +1 ada4853-3 ada4853-1/ ada4853-2 05884-050 figure 22. output impedanc e vs. frequency disabled frequency (mhz) ? 40 ?50 ?70 ?60 ?80 ?90 ?100 ?110 0.1 1 10 g = +2 v s = 3v v out = 2v p-p r l = 1k ? hd3 r l = 1k ? hd2 r l = 150 ? hd3 r l = 150 ? hd2 ha r monic distortion (dbc) 05884-016 figure 23. harmonic distortion vs. frequency g = +2 v s = 5v v out = 2v p-p r l = 1k ? hd3 r l = 1k ? hd2 r l = 150 ? hd2 r l = 150 ? hd3 ? 40 ?50 ?70 ?60 ?80 ?90 ?100 ?120 ?110 0.1 1 10 frequency (mhz) ha r monic distortion (dbc) 05884-017 figure 24. harmonic distortion vs. frequency
data sheet ada4853-1/ada4853-2/ada4853-3 rev. g | page 11 of 20 g = +1 v s = 5v v out = 2v p-p r l = 75 ? hd3 r l = 75 ? hd2 r l = 150 ? hd2 r l = 150 ? hd3 r l = 1k ? hd3 r l = 1k? hd2 ? 40 ?50 ?70 ?60 ?80 ?90 ?100 ?120 ?110 0.1 1 10 frequency (mhz) ha r monicdistortion(dbc) 0 5884-018 figure 25. harmonic distortion vs. frequency ? 30 ?100 0.1 10 frequency (mhz) harmonic distortion (dbc) 1 ?40 ?50 ?60 ?70 ?80 ?90 g=+2 v out =2vp-p r l =75 ? v s = 3v hd3 v s =5vhd2 v s =5vhd3 v s =3vhd2 05884-051 figure 26. harmonic distortion vs. frequency 0123 hd2 hd3 4 v out (v p-p) ? 40 ?50 ?70 ?60 ?80 ?90 ?100 ?120 ?110 ha r monic distortion (dbc) 05884-019 2v 5v gnd g = +1 v s = 5v r l = 150 ? f = 100khz figure 27. harmonic distortion for various output voltages output voltage (v) 05884-033 g = +2 r l = 150 ? 25ns/div v s = 3v v s = 5v 2.60 2.40 2.42 2.44 2.46 2.48 2.50 2.52 2.54 2.56 2.58 figure 28. small signal pulse response for various supplies 2.60 2.40 2.42 2.44 2.46 2.48 2.50 2.52 2.54 2.56 2.58 output voltage (v) g=+1;c l =5pf g=+2;c l = 0pf, 5pf, 10pf v s =5v r l = 150 ? 25ns/div 05884-034 figure 29. small signal pulse response for various capacitive loads output voltage (v) 05884-035 g = +2 r l = 150 ? 25ns/div v s = 3v, 5v 3.75 1.25 1.50 1.75 2.00 2.25 2.50 2.75 3.00 3.25 3.50 figure 30. large signal pulse response for various supplies
ada4853- 1/ada4853 - 2/ada4853 - 3 data sheet 3.75 1.25 1.50 1.75 2.00 2.25 2.50 2.75 3.00 3.25 3.50 output voltage (v) 05884-036 g = +2 v s = 5v r l = 150? 25ns/div c l = 0pf, 20pf figure 31 . large signal pulse response for various capacitive loads 100 n s / d i v 5 . 5 4 . 5 3 . 5 2 . 5 1 . 5 0 . 5 ?0 . 5 input and output voltage (v) o u t p u t 2 i n p u t v s = 5 v g = +2 r l = 150 ? f = 1 m h z 05884-020 figure 32 . output overdrive recovery 100 n s / d i v 5 . 5 4 . 5 3 . 5 2 . 5 1 . 5 0 . 5 ?0 . 5 input and output voltage (v) v s = 5 v g = +1 r l = 150 ? f = 1 m h z i n p u t o u t p u t 05884-021 figure 33 . input overdrive recovery 1 0 10 0 1 k 10 k 100 k 1 m 10 m voltage noise (nv/ hz) f r e q u e nc y ( h z) 100 0 1 0 10 0 05884-037 figure 34 . voltage noise vs. frequency 10 0 1 1 0 1 0 10 0 1 k 10 k 100 k 1 m 10 m current noise (pa/ hz) f r e q u e nc y ( h z) 05884-038 figure 35 . current noise vs. frequency 20 18 16 14 12 10 8 6 4 2 0 ?4 4 3 2 1 ?1 ?3 0 ?2 count v os (mv) v s = 5v n = 155 x = ?0.370mv = 0.782 05884-042 figure 36 . v os distribution rev. g | page 12 of 20
data sheet ada4853-1/ada4853-2/ada4853-3 rev. g | page 13 of 20 ? 0.6 ?0.8 ?1.0 ?1.2 ?1.4 ?1.6 ?1.8 ?2.0 ?1.0 ?0.5 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 v cm (v) v os (mv) 0 5884-022 v s = 5v figure 37. v os vs. common-mode voltage 1.5 1.0 0.5 0 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 power down voltage (v) supply current (ma) v s =5v,t=+85c v s = 5v, t = +25c v s = 5v, t = ?40c v s = 3v, t = ?40c v s = 3v, t = +25c v s =3v,t=+85c 05884-023 figure 38. supply current vs. power down voltage ? 0.6 ?0.7 ?0.8 ?0.9 ?1.0 ?50 ?25 0 25 50 75 100 temperature (c) input offset voltage (mv) v s = 5v v s = 3v 05884-026 figure 39. input offset voltage vs. temperature ? 0.50 ?0.68 ?40?200 20406080 temperature (c) input bias current (a) ?0.52 ?0.54 ?0.56 ?0.58 ?0.60 ?0.62 ?0.64 ?0.66 v s =5v v s =3v +i b ?i b 05884-027 figure 40. input bias current vs. temperature 3.0 2.8 2.6 2.4 0.6 0.4 0.2 0 1 output voltage (v) load resistance ( ? ) 10 100 1k 10k negative swing v s =3v positive swing load resistance tied to midsupply 05884-039 figure 41. output voltage vs. load resistance 5.0 4.8 4.6 4.4 0.6 0.4 0.2 0 10 100 10k 1k output voltage (v) load resistance ( ? ) positive swing v s =5v negative swing load resistance tied to midsupply 05884-040 figure 42. output voltage vs. load resistance
ada4853- 1/ada4853 - 2/ada4853 - 3 data sheet output voltage (v) 3 . 0 2 . 9 2 . 8 2 . 7 2 . 6 2 . 5 0 . 5 0 . 4 0 . 3 0 . 2 0 . 1 0 v s = 3 v 0 5 0 l o ad curr e n t ( m a ) 5 1 0 1 5 2 0 2 5 3 0 3 5 4 0 4 5 05884-041 n e g a t i ve s w i n g p o s i t i ve s w i n g figure 43 . outp ut voltage vs. load current output voltage (v) 5 . 0 4 . 9 4 . 8 4 . 7 4 . 6 4 . 5 0 . 5 0 . 4 0 . 3 0 . 2 0 . 1 0 v s = 5 v 0 5 0 l o ad curr e n t ( m a ) 5 1 0 1 5 2 0 2 5 3 0 3 5 4 0 4 5 05884-052 n e g a t i ve s w i n g p o s i t i ve s w i n g figure 44 . output voltage vs. load current 0 . 2 5 0 t empe ra t ur e ( c ) output saturation voltage (v) 0 . 2 0 0 . 1 5 0 . 1 0 0 . 0 5 ?4 0 ?2 0 0 2 0 4 0 6 0 8 0 r l = 150 ? v s = 3 v ? v s a t +v s a t v s = 5 v 05884-053 figure 45 . output saturation voltage vs. temperature for various supplies +0 . 00 1 (+ 0 . 1 % ) ?0 . 00 1 (? 0 . 1 % ) 0 1 0 2 0 3 0 4 0 5 0 6 0 7 0 8 0 9 0 10 0 11 0 12 0 13 0 14 0 15 0 t i me (n s ) voltage (v) 1 . 9 2 . 0 2 . 1 2 . 2 2 . 3 2 . 4 2 . 5 2 . 6 2 . 7 2 . 8 2 . 9 3 . 0 3 . 1 v s = 5 v r l = 1 5 0 ? v o u t p u t 2v i n p u t 2v i n p u t ? v o u t p u t 2 v input ? v output (v) 05884-045 figure 46 . 0.1% s ettling time rev. g | page 14 of 20
data sheet ada4853- 1/ada4853 - 2/ada4853 - 3 6 5 4 2 3 1 0 3 2 1 0 ?1 0 1 2 3 4 5 6 7 8 9 10 power down pin voltage (v) o u t p u t v o lt a g e ( v ) time (s) power down g = +2 v s = 5v f in = 100khz v out ada4853-1/ ada4853-2 v out ada4853-3 05884-046 figure 47 . enable/disable time ?40 ?100 100k 200m frequency (hz) crosstalk (db) 1m 10m 100m ?50 ?60 ?70 ?80 ?90 v s = 5v g = +2 r l = 150? v out = 2v p-p v out 1 to v out 2 ada4853-2 v out 2 to v out 1 ada4853-2 ada4853-3 all hostile 05884-054 figure 48 . crosstalk vs. frequency 0 ?100 0.1 200 frequency (mhz) input-to-output isolation (db) 1 10 100 ?20 ?40 ?60 ?80 v s = 5v r l = 150? v in = 1v p-p g = +2 05884-055 figure 49 . input - to - output isolation, chip disabled rev. g | page 15 of 20
ada4853- 1/ada4853 - 2/ada4853 - 3 data sheet circuit description the ada4853 - 1 / ada4853 - 2 / ada4853 - 3 feature a high slew rate input stage that is a true single - supply topology capable of sensing signals at or below the minus supply rail. the rail - to - rail output stage can pull within 100 mv of either supply rail when driving light loads an d within 200 mv when driving 150 ?. high speed performance is maintained at supply voltages as low as 2.65 v. headroom considerati ons the ada4853 - 1 / ada4853 - 2 / ada4853 - 3 are designed for use in low voltage systems. to obtain optimum performance, it is useful to understan d the behavior of the amplifiers as input and output signals approach their headroom limits. the input common - mode voltage range of the amplifier extends from the negative supply voltage (actually 200 mv below this) to within 1.2 v of the positive supply v oltage. exceeding the headroom limits is not a concern for any inverting gain on any supply voltage, as long as the reference voltage at the positive input of the amplifier lies within the a input common - mode range of the amplifier . the input stage is the headroom limit for signals approaching the positive rail. figure 50 shows a typical offset voltage vs. the input common - mode voltage for the ada485 3- 1 / ada4853 - 2 / ada4853 - 3 on a 5 v supply. accurate dc performance is maintained from approxim ately 200 mv below the negative supply to within 1.2 v of the positive supply. for high speed signals, however, there are other considerations. as the common - mode voltage gets within 1.2 v of positive supply, the amplifier responds well but the bandwidth b egins to drop as the common - mode voltage approaches the positive supply. this can manifest itself in increased distortion or settling time. higher frequency signals require more headroom than the lower frequencies to maintain distortion performance. ?0.6 ?0.8 ?1.0 ?1.2 ?1.4 ?1.6 ?1.8 ?2.0 ?1.0 ?0.5 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 v cm (v) v os (mv) 05884-022 v s = 5v figu re 50 . v os vs. common - mode voltage, v s = 5 v for signals approaching the negative supply , inverting gain , and high positive gain configurations, the headroom limit is the output stage. the ada4853 - 1 / ada4853 - 2 / ada4853 - 3 use a common - emitter out put stage. this output stage maximizes the available output range, limited by the saturation voltage of the output transistors. the saturation voltage increases with the drive current that the output transistor is required to supply due to the collector re sistance of the output transistor . as the saturation point of the output stage is approached, the output signal shows increasing amounts of compression and clipping. for the input headroom case, higher frequency signals require a bit more headroom than th e lower frequency signals. figure 27 illustrates this point by plotting the typical distortion vs. the output amplitude. overload behavior an d recovery input the specified input common - mode voltage of the ada4853 - 1 / ada4853 - 2 / ada4853 - 3 is 200 mv below the negative supply to within 1.2 v of the positive supply. exceeding the top limit results in lower bandwidth and increased rise time. pushing the input voltage of a unity - gain follower to less than 1.2 v from the positive supply leads to an increasing amount of output error as well as increased settling time. the recovery time from input voltages 1.2 v or closer to the positive supply is approximately 40 ns; this is limited by the settling artifacts caused by transis - tors in the input stage c oming out of saturation. the amplifiers do not exhibit phase reversal, even for input voltages beyond the voltage supply rails. going more than 0.6 v beyond the power supplies turns on protection diodes at the input stage, greatly increasing the current dr aw of the devices. rev. g | page 16 of 20
data sheet ada4853- 1/ada4853 - 2/ada4853 - 3 applications information single - supply video amplifi er with low differential gain and phase errors and wide 0.5 db flatness, the ada4853 - 1 / ada4853 - 2 / ada4853 - 3 are ideal solutions for portable video applications. figure 51 shows a typical video driver set for a noninverting gain of +2, where r f = r g = 1 k?. the video amplifier input is terminated into a shunt 75 ? resistor. at the output, the amplifier has a series 75 ? resistor for impedance matching to the video load . when operating in low voltage, single - supply applications, the input signal is only limited by the input stage headroom. 75? cable v out 75? 75? v in r g r f +v s p d u1 c1 2.2f c2 0.01f 05884-043 + v figure 51 . video amplifier power supply bypassi ng attention must be paid to bypassing the power supply pi ns of the ada4853 - 1 / ada4853 - 2 / ada4853 - 3 . high quality capacitors with low equivalent series resistance (esr), such as multilayer ceramic capacitors (mlccs), should be used to minimize supply voltage ripple and power dissipation. a large, usually tantalum, 2.2 f to 47 f capacitor located in proximity to the ada4853 - 1 / ada4853 - 2 / ada4853 - 3 is required to provide good decoupling for lower frequency signals. the actual value is determined by the circuit transient and frequency requirements. in addition, 0.1 f mlcc decoupling capacitors should be located as close to each of the power supply pins as is physically possible, no more than ? inch away. the ground returns should terminate immediately into the ground plane. locating the bypass capacitor return close to the load return minimizes ground loops and improves performance. layout as is the case with all high speed applications, careful attention to printed circuit board (pcb) layout details prevents associated board parasitics from becoming problematic. the ada4853 - 1 / ada4853 - 2 / ada4853 - 3 can oper ate at up to 100 mhz; there - fore, proper rf design techniques must be employed. the pcb should have a ground plane covering all unused portions of the component side of the board to provide a low impedance return path. removing the ground plane on all laye rs from the area near and under the input and output pins reduces stray capacit - ance. signal lines connecting the feedback and gain resistors should be kept as short as possible to minimize the inductance and stray capacitance associated with these traces. termination resistors and loads should be located as close as possible to their respective inputs and outputs. input and output traces should be kept as far apart as possible to minimize coupling (crosstalk) through the board. adherence to microstrip or s tripline design techniques for long signal traces (greater than 1 inch) is recommended. for more information on high speed board layout, go to www.analog.com to view a practical guide to high - speed printed - circuit - board layout . rev. g | page 17 of 20
ada4853-1/ada4853-2/ada4853-3 data sheet rev. g | page 18 of 20 outline dimensions 1.30 bsc compliant to jedec standards mo-203-ab 1.00 0.90 0.70 0.46 0.36 0.26 2.20 2.00 1.80 2.40 2.10 1.80 1.35 1.25 1.15 072809-a 0.10 max 1.10 0.80 0.40 0.10 0.22 0.08 3 12 4 6 5 0.65 bsc coplanarity 0.10 seating plane 0.30 0.15 figure 52. 6-lead thin shrink small outline transistor package [sc70] (ks-6) dimensions shown in millimeters compliant to jedec standards mo-153-ab-1 061908-a 8 0 4.50 4.40 4.30 14 8 7 1 6.40 bsc pin 1 5.10 5.00 4.90 0.65 bsc 0.15 0.05 0.30 0.19 1.20 max 1.05 1.00 0.80 0.20 0.09 0.75 0.60 0.45 coplanarity 0.10 seating plane figure 53. 14-lead thin shrink small outline package [tssop] (ru-14) dimensions shown in millimeters
data sheet ada4853-1/ada4853-2/ada4853-3 rev. g | page 19 of 20 3.10 3.00 sq 2.90 0.30 0.25 0.20 1.65 1.50 sq 1.45 1 0.50 bsc bottom view top view 16 5 8 9 12 13 4 exposed pad p i n 1 i n d i c a t o r 0.50 0.40 0.30 seating plane 0.05 max 0.02 nom 0.20 ref 0.20 min coplanarity 0.08 pin 1 indicator 0.80 0.75 0.70 compliant to jedec standards mo-220-weed-6. for proper connection of the exposed pad, refer to the pin configuration section of this data sheet. 01-26-2012-a figure 54. 16-lead lead frame chip scale package [lfcsp_wq] 3 mm 3 mm body, very very thin quad (cp-16-27) dimensions shown in millimeters ordering guide model 1, 2 temperature range package description ordering quantity package option branding ada4853-1aksz-r2 ?40c to +85c 6-lead thin shrink small outline transistor package (sc70) 250 ks-6 hec ada4853-1aksz-r7 ?40c to +85c 6-lead thin shrink small outline transistor package (sc70) 3000 ks-6 hec ada4853-1aksz-rl ?40c to +85c 6-lead thin shrink small outline transistor package (sc70) 10,000 ks-6 hec ada4853-1aks-ebz evaluation board 1 ada4853-2ycpz-r2 ?40c to +105c 16-lead lead frame chip scale package (lfcsp_wq) 250 cp-16-27 h0h ada4853-2ycpz-rl ?40c to +105c 16-lead lead frame chip scale package (lfcsp_wq) 5000 cp-16-27 h0h ada4853-2ycpz-rl7 ?40c to +105c 16-lead lead frame chip scale package (lfcsp_wq) 1500 cp-16-27 h0h ada4853-2ycp-ebz evaluation board 1 ada4853-3ycpz-r2 ?40c to +105c 16-lead lead frame chip scale package (lfcsp_wq) 250 cp-16-27 h0l ada4853-3ycpz-rl ?40c to +105c 16-lead lead frame chip scale package (lfcsp_wq) 5000 cp-16-27 h0l ada4853-3ycpz-r7 ?40c to +105c 16-lead lead frame chip scale package (lfcsp_wq) 1500 cp-16-27 h0l ada4853-3wycpz-r7 ?40c to +105c 16-lead lead frame chip scale package (lfcsp_wq) 1500 cp-16-27 h2h ADA4853-3YCP-EBZ evaluation board ada4853-3yruz ?40c to +105c 14-lead thin shrink small outline package (tssop) 96 ru-14 ada4853-3yruz-rl ?40c to +105c 14-lead thin shrink small outline package (tssop) 2500 ru-14 ada4853-3yruz-r7 ?40c to +105c 14-lead thin shrink small outline package (tssop) 1000 ru-14 ada4853-3yru-ebz evaluation board 1 1 z = rohs compliant part. 2 w = qualified for auto motive applications. automotive products the ada4853-3w model is available with controlled manufacturing to support the quality and reliability requirements of automotive applications. note that these automotive models may have specifications that differ from the commercial models; therefore, desi gners should review the specifications section of this data sheet carefully. only the automotive grade products shown are available f or use in automotive applications. contact your local analog devices account representative for specific product ordering information and to obtain the specific automotive reliability reports for these models.
ada4853- 1/ada4853 - 2/ada4853 - 3 data sheet notes ? 2006 C 2014 analog devices, inc. all right s reserved. trademarks and registered trademarks are the property of their respective owners. d05884 - 0- 12/14(g) rev. g | page 20 of 20

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